On May 22, 2024, the European Patent Office revoked the original claims of EP 3767950, owned by Dolby International AB. The original claims of EP‘950 were identified as essential to the Access Advance Patent Pool.
Claims during the opposition process, however, were allowed. But the amended claims of the EP’950 patent do not appear to be essential to the HEVC standard for at least two reasons—(1) the process required by H.265 is different from that recited in the claims and (2) the indicator used in H.265 is a two-bit indicator when the claims recite a one-bit flag.
EP ‘950 is generally directed to tracking reference pictures for use in digital image decoding using a picture order count cycle parameter. The amended claims require a “wrap indicator” that is used to indicate “a transition between two sets of pictures,” with the “wrap indicator being a one bit flag.” The “current picture order count cycle parameter…updat[es] a previous picture order count cycle parameter after receiving the wrap indicator."
Basically, the amended claim's “wrap indicator” indicates to a decoder that the Picture Order Count (POC) has reached its maximum value, which means the set of pictures has changed. Once POC reaches its maximum value, the one-bit “wrap indicator” is sent to notify the decoder and the POC is reset to 0. See, e.g., EP ‘950 at para. [0160]; Reply of the Patent Proprietor to the Notice of Opposition, Dated June 6, 2023 (“a transition between two different sets of pictures take place when a number of pictures in the first set has reached a predetermined maximum value in the number of pictures…this is signaled by a the wrap indicator”).
But H.265 uses a different process. In H.265, the decoder's POC is reset based on the values of a most significant bit (msb) and a least significant bit (lsb). When both the msb and lsb are reset, the POC value is reset. A POC reset indicator (poc_reset_idc) is sent to the decoder to indicate one of four different states for the msb and lsb: (1) poc_reset_idc=0 indicates that neither the msb nor the lsb are reset; (2) poc_reset_idc=1 indicates only the msb is reset; (3) poc_reset_idc=2 indicates that both the msb and lsb are reset; and (4) poc_reset_idc=3 indicates that a state where either only the msb of POC is reset or that both msb and lsb are reset. In the fourth state (when poc_reset_idc=3), an additional indicator is used—full_POC_reset_flag—to differentiate between when only the msb is reset and when both the msb and lsb are reset. Accordingly, a POC reset can be triggered at the decoder when (a) poc_reset_idc=2 or (b) poc_reset_idc=3 and full_POC_reset_flag is present. Thus, the H.265 process involves a poc_reset_idc that is based on the values of the msb and lsb, not the maximum POC. And poc_reset_idc is not a flag, but an indicator with four values where it may cause the POC to reset based on poc_reset_idc’s value alone or the poc_reset_idc’s value in conjunction with a full_POC_reset_flag. See, e.g., Section F.7.4.7.1, F.8.3.1.
Moreover, not only is the process different, but because poc_reset_idc has four values, it is a two-bit indicator, not the required one-bit flag.
Unified is represented by Dr. Susan E. Keston and Harry Hutchinson of HGF Law, and by in-house counsel, Jessica L.A. Marks and Roshan Mansinghani.